PSI - Issue 17
Pedro J. Sousa et al. / Procedia Structural Integrity 17 (2019) 828–834 Sousa et. al. / Structural Integrity Procedia 00 (2019) 000 – 000
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Fig. 1. Schematic of the implemented LED controller
Here, there are two power supplies, referred as LV and HV. The first one is used for the control portion of the circuit, and the latter is used for the power portion. As the chosen LEDs require voltages of at least 50V and there is an interest in being able to control the current flowing through an LED using the supply voltage, the HV voltage is generated using a standard adjustable boost circuit, capable of outputting from the input voltage up to 80V. The HV source can be shared between multiple LED controllers if its maximum current output is larger than the total startup load. The load imposed by each controller is set by the current limiting resistor (R1). The main control component of this system is the MOSFET (Q1), as it is responsible for controlling the flow of current through the connected LED. A model that is capable of withstanding high voltages, up to 600V, was chosen. Even though the currently used boost module is only capable of outputting 80V, it was considered important to select a more capable MOSFET for possible future upgrades. These MOSFETs require high gate currents for fast switching. As such, a 9A MOSFET driver from Texas Instruments was selected. This driver is capable of accepting 5V TTL pulses even when powered by voltages up to 15V, noted as LV in the schematic. The capacitance of the capacitor bank (represented by C1 and C2) is chosen as a compromise between cost and the duty cycle of pulses it withstands. R1 restricts the current that is sourced from the power supply during the pulses. A small value (1 Ω ) is enough to have most of the LED’s current coming from the capacitor bank during pulses . However, during startup, it is necessary to fill the capacitor bank. This requires power and the time it takes also depends on this resistor. Higher resistance allows for more parallel controllers, even though with a slower filling rate. The circuit was simulated using LTSpice before prototyping, in order to understand the effects of the different components, as well as the effect of parasitic inductance introduced by the wires between the board and the LED. It was found that the effects of this inductance could be mitigated either by shortening the wires or by introducing a capacitor as close as possible to the LED. Fr om this analysis, it was possible to understand the capacitance requirements for 1 μs pulses repeated with a 1 ms period. Furthermore, it was also observed that with an electrolytic capacitor of 1000 μF or more and a polypropylene capacitor of 1 μF the output would be stable. Additionally, a current limiting resistor of 1 Ω would be enough to ensure that the current to the LED is provided by the capacitor bank. In order to have more margin, the selected value for the electrolytic capacitor was 2200 μF. For this circuit, a PCB was designed and prototyped, Fig. 2, and tested. The LED response was evaluated using a Thorlabs PDA10A-EC photodetector, and is shown in Fig. 3. It should be noted that the ringing observed in the trigger signal is due to the band limiting performed by the oscilloscope, as there are frequency components that go beyond the oscilloscope’s bandwidth.
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